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Center for Advanced Electronics Through Machine Learning (CAEML)

Center Overview

The Center for Advanced Electronics Through Machine Learning (CAEML) enables fast, accurate design and verification of microelectronic circuits and systems by creating machine-learning algorithms to derive models for electronic design automation.

Electronic design automation must advance in response to increasingly ambitious goals for low power, high performance, and a short design cycle time, as well as to increasing concerns about security. Existing machine-learning techniques fall short when applied to systems with many ports, which contain reliability hazards and have nonlinear responses and variability. There is an unmet need for models, methods, and tools that enable fast, accurate design and verification while protecting intellectual property. A behavioral approach to systems modeling will meet this need. CAEML develops new domain-specific machine-learning algorithms to produce models using limited training data. Designers' knowledge is used to speed up learning and impose physical constraints on the models.

CAEML pioneers the application of emerging machine-learning techniques to microelectronics and microsystems modeling. CAEML collaborates with microelectronics industry partners, whose products include electronic design automation tools, integrated circuits, mobile systems, and hardware for cloud computing. Working closely with these industry partners ensures that CAEML provides models and tools that will facilitate communications between customers and suppliers while protecting the proprietary information of all parties. This will lead to more efficient and reliable production.

Universities

Georgia Institute of Technology
North Carolina State University
University of Illinois, Urbana-Champaign

View Center Website

Center Personnel

Paul Franzon
NCSU Site Director
+1 919 515 2444
paulf@ncsu.edu

Elyse Rosenbaum
Center Director
+1 217 333 2187
elyse@uiuc.edu

Madhavan Swaminathan
GaTech Site Director
+1 404 894 4819
madhavan.swaminathan@ece.gatech.edu

Jill Peckham
Center Operations Manager
+1 217 265 5292
jpeckham@illinois.edu

Research Focus

Back-end integrated circuit design

CAEML uses machine learning to set up customized physical design tools to achieve optimal results with minimal human interaction.

Computationally efficient simulation of circuit aging including stochastic effects

CAEML is developing a method for accurate and efficient simulation of circuit aging due to hot carrier injection and bias temperature instability. Computational efficiency is achieved by using a recurrent neural network to represent a library cell or IP block.

Enabling side-channel attacks on post-quantum protocols through machine learning

CAEML enables single-trace power, side-channel attacks on post-quantum key-exchange protocols using machine learning and quantifies the strength of timing obfuscation defenses against those attacks.

High-dimensional structural inference

In many applications, a time series of high-dimensional latent vector variables is observed indirectly from noisy measurements. CAEML's research investigates deep Markov models, in which an inference network approximates a posterior probability for the time-dynamics of latent variables by running a multilayer perceptron neural network.

High-speed bus physical design analysis

CAEML is creating a dynamic machine-learning ecosystem to characterize electrical performance of each net in a given printed circuit board or package layout file with confidence bounds and to leverage pre-physical design simulation to collect training data. Stochastic collocation is used to account for manufacturing tolerance and nets will be ranked in descending order of signal integrity performance to determine any bottleneck in the system.

Machine learning to predict successful field programmable gate arrays (FPGA) compilation strategies

CAEML is producing FPGA compilation recipes that show a high success rate and fast compilation time.

Modular machine learning for behavioral modeling of microelectronic circuits and systems

CAEML combines the inherent modularity of modern machine-learning algorithms with the behavioral approach to system design and simulation, to develop mathematical tools for assessing the performance and minimal data requirements for learning a low-complexity representation of the system behavior, one component or subsystem at a time.

Power/performance/area (PPA) prediction

CAEML builds machine learning models and develops associated tools to predict PPA given a register-transfer level description of a circuit, eliminating the need to undertake the lengthy physical design process. To maximize the accuracy of PPA predictions while minimizing the data collection effort, CAEML also is developing a comprehensive data mining methodology.

Trusted platform design

CAEML uses machine-learning techniques to assess whether an "internet of things" system is under cyberattack via power or radio frequency side channels and develop hardware countermeasures to identify and nullify such attacks.

Awards

2345055

IUCRC Phase II Georgia Institute of Technology: Center for Advanced Electronics through Machine Learning [CAEML]

The design complexity of modern microelectronic systems, e.g., a chip with over one billion transistors, requires automated design checks and computer simulations for verifying the functionality and reliability of microelectronic components or systems prior to manufacturing. The computer memory and run time tend to increase with design complexity, and therefore it is necessary to adopt a simplified description of the system, with reduced accuracy, to complete the design process in a timely and cost-efficient manner. This project will apply machine learning to microelectronic design verification and optimization, that results in reduced design cycle time, with radically improved accuracy and reliability.

CAEML, the Center for Advanced Electronics through Machine Learning, will develop a behavioral, machine-learning approach to hardware modeling, emphasizing the accuracy of the end-to-end system model. Uncertainty quantification is applied to reduce reliance on design guard-banding. CAEML will research techniques for collaborative machine learning (ML), whereby multiple organizations can jointly train ML models using their proprietary design data but without releasing any confidential information. Inverse models will be demonstrated as a feasible approach to design space exploration based on specifications. CAEML includes experts on design and machine learning theory; Georgia Tech provides expertise on optimization and physical design of microelectronics.

The microelectronics industry undergirds larger vertical markets, including computing, communications, and transportation. CAEML serves the vitally important microelectronics industry with its research, workforce development, and continuing education programs. CAEML research will improve the efficiency of the design process and the quality of the final product; the first reduces costs and the second directly benefits the public. Microelectronic systems that are both secure and reliable allow government and utilities to provide critical services to the public, while low-power microelectronic systems promote environmental sustainability. CAEML provides the microelectronics industry with a diverse pool of new graduates who have excellent professional preparation.

CAEML will maintain a single repository to be used for depositing and dissemination of data, documents, and code across the Center. Repository files will be stored on virtual directories that reside on an Illinois Grainger College of Engineering (GCOE) storage array. The format of the data will be documented with metadata files that provide an explanation of the exact format. The Repository will be backed up regularly, following GCOE standards and practices. Experimental data will be retained for at least three years and as governed by the policies of the institution at which the data were gathered.

This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria. Read More >

2137259

IUCRC Phase II Georgia Institute of Technology: Center for Advanced Electronics through Machine Learning [CAEML]

2137288

IUCRC Phase II University of Illinois Urbana Champaign: Center for Advanced Electronics through Machine Learning (CAEML)

The design complexity of modern microelectronic systems, e.g., a chip with over one billion transistors, necessitates the use of automated design checks and computer simulations to verify the functionality and reliability of microelectronic components and systems prior to manufacturing. The computer memory and run time increase with design complexity, and thus one typically adopts a simplified description of the system, with reduced accuracy, to complete the design process in a timely and cost-efficient manner. This project will apply machine learning to microelectronic design verification and optimization, improving accuracy and resulting in a reduced design cycle time and radically improved reliability.

CAEML, the Center for Advanced Electronics through Machine Learning, will develop a behavioral, machine-learning approach to hardware modeling, emphasizing the accuracy of the end-to-end system model. Uncertainty quantification is applied to reduce reliance on design guard-banding. CAEML will research techniques for collaborative machine learning (ML), whereby multiple organizations can jointly train ML models using their proprietary design data but without releasing any confidential information. Inverse models will be demonstrated as a feasible approach to design space exploration based on specifications. CAEML brings together experts on microelectronics design and machine learning; Illinois provides expertise on signal integrity and nonlinear dynamical systems.

The microelectronics industry undergirds larger vertical markets, including computing, communications, and transportation. CAEML serves the vitally important microelectronics industry with its research, workforce development, and continuing education programs. CAEML research will improve the efficiency of the design process and the quality of the final product; the first reduces costs and the second directly benefits the public. Microelectronic systems that are both secure and reliable allow government and utilities to provide critical services to the public, while low-power microelectronic systems promote environmental sustainability. CAEML provides the microelectronics industry with a diverse pool of new graduates who have excellent professional preparation.

CAEML will maintain a single repository to be used for depositing and dissemination of data, documents, and code across the Center. Repository files will be stored on virtual directories that reside on an Illinois Grainger College of Engineering (GCOE) storage array. The format of the data will be documented with metadata files that provide an explanation of the exact format. The Repository will be backed up regularly, following GCOE standards and practices. Experimental data will be retained for at least three years and as governed by the policies of the institution at which the data were gathered.

This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria. Read More >

2137283

IUCRC Phase II North Carolina State University: Center for Advanced Electronics through Machine Learning [CAEML]

The design complexity of modern microelectronic systems, e.g., a chip with over one billion transistors, requires automated design checks and computer simulations for verifying the functionality and reliability of microelectronic components or systems prior to manufacturing. The computer memory and run time tend to increase with design complexity, and therefore it is necessary to adopt a simplified description of the system, with reduced accuracy, to complete the design process in a timely and cost-efficient manner. This project will apply machine learning to microelectronic design verification and optimization that results in reduced design cycle time, with radically improved accuracy and reliability.

CAEML, the Center for Advanced Electronics through Machine Learning, will develop a behavioral, machine-learning approach to hardware modeling, emphasizing the accuracy of the end-to-end system model. Uncertainty quantification is applied to reduce reliance on design guard-banding. CAEML will research techniques for collaborative machine learning (ML), whereby multiple organizations can jointly train ML models using their proprietary design data but without releasing any confidential information. Inverse models will be demonstrated as a feasible approach to design space exploration based on specifications. CAEML includes experts on microelectronics design and machine learning theory; North Carolina State University provides expertise on design tool flows.

The microelectronics industry undergirds larger vertical markets, including computing, communications, and transportation. CAEML serves the vitally important microelectronics industry with its research, workforce development, and continuing education programs. CAEML research will improve the efficiency of the design process and the quality of the final product; the first reduces costs and the second directly benefits the public. Microelectronic systems that are both secure and reliable allow government and utilities to provide critical services to the public, while low-power microelectronic systems promote environmental sustainability. CAEML provides the microelectronics industry with a diverse pool of new graduates who have excellent professional preparation.

CAEML will maintain a single repository to be used for depositing and dissemination of data, documents, and code across the Center. Repository files will be stored on virtual directories that reside on an Illinois Grainger College of Engineering (GCOE) storage array. The format of the data will be documented with metadata files that provide an explanation of the exact format. The Repository will be backed up regularly, following GCOE standards and practices. Experimental data will be retained for at least three years and as governed by the policies of the institution at which the data were gathered.

This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria. Read More >

Member Organizations

IUCRC affiliated member organizations are displayed as submitted by the Center. Non-federal organizations are not selected, approved, or otherwise endorsed by the U.S. National Science Foundation.

The opinions, findings, and conclusions or recommendations expressed are those of the Center author(s) and do not necessarily reflect the views of the U.S. National Science Foundation.